VME MOTHERBOARD, MODEL VME-Mx
FEATURES:
·
6U,
VME 64x single width, with live insertion and extraction
·
High-Speed
FPGA VME interface and control
·
Accepts
one or four daughter cards, each with FPGA and two individual SRAM’s
·
A
four-channel unit that uses a single Control array to access each daughter card
·
The
arrays are front panel JTAG programmable
·
Each
array has in excess of 50% of its logic available for customization
·
Daughter
cards range from 125Mhz, 16 bit digitizers to low cost ADC’s, DAC’s, counters,
I/O interfaces and motor controllers
·
SMA
and ribbon connectors access module
·
Surface
mounted parts for increased density and low per channel cost
·
Performance
requires the use of an appropriate daughter card and the proper motherboard
Consult
our web site for a complete data sheet: www.joergerinc.com
VME DAUGHTER CARDS
ANALOG
TO DIGITAL CONVERTER, HIGH-SPEED
MODEL |
INDIVIDUAL
CHANNELS |
ADC
SPEED/ RESOLUTION |
INPUT
CONFIGURE |
INPUT
OFFSET |
INPUT IMPEDANCE |
MOTHER BOARD CONTROL |
MOTHER BOARD MEMORY (SRAM) |
ADC4/14-25 |
4
|
1Mhz
to 25Mhz/ 14
bits |
+/-
2.5 Volts, single/ differential Selectable |
Full
Scale with offset DAC’s |
DC
coupled 50,
100, 100k Selectable |
FPGA,
ALTERA CYCLONE 2, JTAG Programmable |
256K
x 14 bits per channel |
ADC4/14-80 |
4
|
1Mhz
to 80Mhz/ 14
bits |
SAME |
SAME |
SAME |
SAME |
SAME |
ADC4/14-125 |
4
|
1M
to 125Mhz/ 14
bits |
SAME |
SAME |
SAME |
SAME |
SAME |
ANALOG TO DIGITAL CONVERTER, UNDER SAMPLING
MODEL |
INDIVIDUAL
CHANNELS |
ADC
SPEED/ RESOLUTION |
INPUT
CONFIGURE |
INPUT
OFFSET |
CLOCK
JITTER |
MOTHER
BOARD CONTROL |
MOTHER BOARD MEMORY (SRAM) |
ADC125/16 |
2
|
1Mhz
to 125Mhz/ 16
bits |
150mv
p-p, 50
ohms, AC coupled, signal band width 5-300MHZ |
Settable
to zero |
300fS,
for excellent under-sampling |
FPGA,
ALTERA, CYCLONE 2, JTAG Programmable |
512k
x 16 bits, per channel |
DIGITAL
TO ANALOG CONVERTER, ARBITRARY WAVEFORM GENERATOR
MODEL |
INDIVIDUAL
CHANNELS |
SPEED/ RESOLUTION |
OUTPUT |
GLITCH
OUTPUT |
MOTHER BOARD CONTROL |
MOTHER
BOARD MEMORY (SRAM) |
|
AWG125/14 |
2
|
DC
to 125Mhz/ 14 bits |
+/-
1 VOLT into 50 ohms |
Full
scale with offset DAC’s |
5pV-sec,
Excellent for wave form generation |
FPGA,
ALTERA, CYCLONE 2, JTAG
Programmable |
512k
x 14 bits per
channel |
CONTROL CARDS
ADC,
DAC & COUNTER
MODEL |
ANALOG
INPUTS |
ANALOG
OUTPUTS |
COUNTERS |
MOTHER BOARD CONTROL |
ADC/DAC |
12
Individual ADC’S, 16 bits, +/-
5, +/- 10 V, input range., speed
250khz |
4
Individual DAC’S, 16 bits, +/- 10 V output range, speed
10usec |
3,
Individual, 16 bits, UP/
DOWN/ PRESET counters, JTAG
programmable with on board FPGA |
FPGA,
ALTERA, CYCLONE 2, JTAG
Programmable |
Consult our web site for complete data sheets: www.joergerinc.com